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The procedure for bringing up the Multi-Bunch Feedback processor system for the first time in a new environment is a little involved and is documented below.
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- The two FMC cards must be placed in the AMC 525 carrier in the correct slots, with the Digital I/O card in slot 0 and the FMC 500 in slot 1. See the image below to verify the correct configuration:
- Note that in order to avoid an I2C collision with an AMC temperature sensor (and thus a MTCA IPMI alert which won't go away) it is necessary to cut a line on the Digital I/O card (is this documented anywhere?
- When placing the AMC cards in the crate it seems that it is necessary to be careful about which cards are (logically) adjacent to the processor card. To avoid problems, at DLS we have install the processor card in slot 6 and the carrier cards in slots 2 and 3 (note that these slot numbers don't correspond to the PCIe addresses which we'll encounter later). Specifically, it seems that with the processor card in slot 6 we need to avoid placing a carrier card in slot 5, as otherwise the processor card tries to boot from non-existent mass storage in this slot!
- Now e-keying must be configured. At this point we recommend that all serial ports are configured with the same data rate, ... The default line speed is 115200 8N1 for all ports except for the CPU console which defaults to 9600 8N1.
- Now e-keying must be configured.
Table of relevant serial ports
Card | Port | Description |
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UTC002 | SER | Serial console to MCH. Not normally used. |
AMC720 (CPU) | IPMI RS-232 | CPU IPMI port. Use for ekey configuration only. |
PCH RS-232 | CPI serial console port. Use for BIOS and basic system administration. | |
AMC525 | MGT RS-232 | Carrier card IPMI port. Use for ekey configuration only. |
CPU RS-232 | P2040 CPU serial console. Not normally used. |
E-key configuration
Once the hardware has been configured as above the crate can be powered on and the e-keying for the CPU and AMC525 must be set up. This will be particularly important to ensure that the PCIe link works properly.
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Title | Purpose | |
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*1 | Gigabit Ethernet - Port 0 | Administration interface to AMC cards and MCH |
*3 | PCIe Root - Ports 4-11 | 8 lane PCIe connection to AMC carrier cards |
Note: Port 1 is enabled but not used.
AMC e-key
Connect to the MGT-RS232 port on the AMC525 front panel, and type ekey
at the prompt. Adjust for the following settings:
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If VADJ
is not already set to 1.80V select 0 above to configure.
Cabling
Connections to Digital I/O card.
These are Limo ERA.00.250 sockets taking FFS.00.250 connectors. All inputs are configured as 3.3V TTL high impedance (though 50Ω termination can be configured in software if desired), all outputs are driven as 3.3V TTL. All inputs are acted on once per machine revolution in response to a rising edge, but are continuously sampled (at machine RF frequency).
Port | Dir | Description |
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1 | In | General purpose trigger. Designed for general event triggering, connected to machine synchronous 5Hz source at DLS. |
2 | In | Postmortem trigger. Alternative trigger source, connected to Machine Protection System loss event trigger for postmortem capture. |
3 | In | Blanking trigger. Used for suppressing measurement of beam disturbance during injection transients. |
4, 5 | Out | Programmable sequencer events. These are pulsed (pulse width is 62 machine clock ticks) when the sequencer enters the selected state. Each sequencer has its own pulsed output. These are designed to be interface to external equipment if required. Channel 0 drives port 4, channel 1 drives port 5. |
Connections to FMC500 card
These are all SSMC sockets. The connectors should not be tighter than finger tight, our experience is that over-tightening can use the inner conductor to lose contact. The official documentation (see page 26) recommends 0.2 Nm coupling torque.
Port | Dir | Signal | Description |
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DAC 1 OUT- DAC 1 OUT+ | Out | ±1V into 50Ω, DC to 500 MHz | Channel 1 differential output. Outputs are driven directly by a LMH6554 amplifier. Unused outputs should probably be terminated into 50Ω. |
DAC 0 OUT- DAC 0 OUT+ | Out | Channel 0 differential output. | |
CLK IN | In | ±0.3 to 3.3V into 50Ω, 250 to 500 MHz. | Machine RF clock. |
CLK OUT | Unused | ||
EXT TRG | In | 0 to 3.3V into 50Ω, threshold at 1.2V. | To ensure synchronisation with the machine revolution a fast rising edge is expected at machine revolution frequency. This signal is synchronised to once during startup, and is sampled continuously thereafter. |
ADC 0 | In | ±1V into 50Ω, DC to 250 MHz | Channel 0 single ended input. |
ADC 1 | In | Channel 1 single ended input. |