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The procedure for bringing up the Multi-Bunch Feedback processor system for the first time in a new environment is a little involved and is documented below.

Preparing Hardware

Populating the crate

  • The two FMC cards must be placed in the AMC 525 carrier in the correct slots, with the Digital I/O card in slot 0 and the FMC 500 in slot 1.  See the image below to verify the correct configuration:
  • Note that in order to avoid an I2C collision with an AMC temperature sensor (and thus a MTCA IPMI alert which won't go away) it is necessary to cut a line on the Digital I/O card (is this documented anywhere?
  • When placing the AMC cards in the crate it seems that it is necessary to be careful about which cards are (logically) adjacent to the processor card.  To avoid problems, at DLS we have install the processor card in slot 6 and the carrier cards in slots 2 and 3 (note that these slot numbers don't correspond to the PCIe addresses which we'll encounter later).  Specifically, it seems that with the processor card in slot 6 we need to avoid placing a carrier card in slot 5, as otherwise the processor card tries to boot from non-existent mass storage in this slot!
  • At this point we recommend that all serial ports are configured with the same data rate.  The default line speed is 115200 8N1 for all ports except for the CPU console which defaults to 9600 8N1.
  • Now e-keying must be configured.

Table of relevant serial ports

CardPortDescription
UTC002SERSerial console to MCH.  Not normally used.

AMC720

(CPU)

IPMI RS-232CPU IPMI port.  Use for ekey configuration only.
PCH RS-232CPI serial console port.  Use for BIOS and basic system administration.
AMC525MGT RS-232Carrier card IPMI port.  Use for ekey configuration only.
CPU RS-232P2040 CPU serial console.  Not normally used.

E-key configuration

Once the hardware has been configured as above the crate can be powered on and the e-keying for the CPU and AMC525 must be set up.  This will be particularly important to ensure that the PCIe link works properly.

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These are Limo ERA.00.250 sockets taking FFS.00.250 connectors.  All inputs are configured as 3.3V TTL high impedance (though 50Ω termination can be configured in software if desired), all outputs are driven as 3.3V TTL.  All inputs are acted on once per machine revolution in response to a rising edge, but are continuously sampled (at machine RF frequency).

PortDirDescription
1InGeneral purpose trigger.  Designed for general event triggering, connected to machine synchronous 5Hz source at DLS.
2InPostmortem trigger.  Alternative trigger source, connected to Machine Protection System loss event trigger for postmortem capture.
3InBlanking trigger.  Used for suppressing measurement of beam disturbance during injection transients.
4, 5OutProgrammable sequencer events.  These are pulsed (pulse width is 62 machine clock ticks) when the sequencer enters the selected state.  Each sequencer has its own pulsed output.  These are designed to be interface to external equipment if required.  Channel 0 drives port 4, channel 1 drives port 5.

Connections to FMC500 card

These are all SSMC sockets.  The connectors should not be tighter than finger tight, our experience is that over-tightening can use the inner conductor to lose contact.  The official documentation (see page 26) recommends 0.2 Nm coupling torque.

PortDirSignalDescription

DAC 1 OUT-

DAC 1 OUT+

Out±1V into 50Ω, DC to 500 MHzChannel 1 differential output.  Outputs are driven directly by a LMH6554 amplifier.  Unused outputs should probably be terminated into 50Ω.

DAC 0 OUT-

DAC 0 OUT+

OutChannel 0 differential output.
CLK INIn±0.3 to 3.3V into 50Ω, 250 to 500 MHz.Machine RF clock.
CLK OUTUnused
EXT TRGIn0 to 3.3V into 50Ω, threshold at 1.2V.To ensure synchronisation with the machine revolution a fast rising edge is expected at machine revolution frequency.  This signal is synchronised to once during startup, and is sampled continuously thereafter.
ADC 0In±1V into 50Ω, DC to 250 MHzChannel 0 single ended input.
ADC 1InChannel 1 single ended input.

System Software Setup

At this point the MTCA crate and all cards should be in a position to power up.  Now tangle with the BIOS and install your choice of Linux (we use RHEL 7 for this at DLS).  No special drivers (except for the MBF driver, we'll get onto that) need to be installed, but you'll probably want IPMI administration configured.

Networking

Two out of the four available network ports need to be configured:

PortNameDescription
MTCA port 0enp1s0f1Internal administration network.  Configure as 192.168.40.0/24 network, see below for existing nodes on this network.
Front panel ETH0enpls0f3External network.  I suggest not configuring any routing to the internal network.

The administration network connects to the MCH and the P2040 CPU on the AMC card.  By default the following addresses are assigned:

AddressDevice
192.168.40.250

MCH.  Connect to this as root with password root, or use ipmitool, for example:

Code Block
ipmitool -I lan -H 192.168.40.250 -U '' -P '' shell
192.168.40.200

AMC525.  If more than one AMC525 is installed the network address will need to be changed by logging on through the serial console (user root, no password) and editing /etc/network/interfaces.  Note that this CPU sees 4 network ports, but only eth0 is used (eth1 connects to MTCA port 1 which we're not using, and eth2 and eth3 connect to the FPGA where they will be ignored).

This interface will be used for programming the FPGA.

We can now validate the system by logging on to the MCH and AMC525 cards through the internal network.

MBF Kernel Driver

At some point before running the software the MBF kernel driver will need to be installed on the AMC720 processor. The following top level makefile targets may be helpful:

TargetDescription
driverBuilds kernel module amc525_lmbf.ko in build/kbuild-$(uname -r).  Needs to be run on target system for module to be usable.
insmodEnsures kernel module is built and runs insmod to add to the current kernel.  Needs to be run on target system.
driver-rpmBuilds DKMS based RPM for driver.  Can be run on any system, resulting RPM can be permanently installed on target system.

The details of how to manage driver installation are somewhat distribution specific.  Once the module has been installed it should be automatically picked up when the FPGA is loaded.

Bringing up the FPGA

  •  Michael Abbott The automation tools here need to be modified to be generic and the instruction here fixed

First of all the FPGA must be loaded onto the AMC card.  The following commands run on the target system will do the necessary work:

Code Block
BIT_FILE=amc525_lmbf.bit
ip=192.168.40.200
scp "$BIT_FILE" root@$ip:/tmp/amc525_lmbf.bit
ssh -x root@$ip amc525_lbtool fpga_load /tmp/amc525_lmbf.bit

At this point run lspci -v, and you should see something like the following:

Code Block
04:00.0 Signal processing controller: Xilinx Corporation FPGA Card XC7VX690T
    Subsystem: Xilinx Corporation Device 0007
    Physical Slot: 0
    Flags: bus master, fast devsel, latency 0, IRQ 70
    Memory at fe300000 (64-bit, non-prefetchable) [size=1M]
    Memory at fe400000 (64-bit, non-prefetchable) [size=64K]
    Capabilities: <access denied>
    Kernel driver in use: amc525_lmbf

If we see this then the FPGA has been successfully loaded and the PCIe link is working correctly.  Alas, the PCIe IO memory cannot be mapped at this stage because it is too late for the BIOS to identify it.  Now reboot the processor card and re-run lspci -v and we should now see:

Code Block
04:00.0 Signal processing controller: Xilinx Corporation FPGA Card XC7VX690T
    Subsystem: Xilinx Corporation Device 0007
    Physical Slot: 0
    Flags: bus master, fast devsel, latency 0, IRQ 70
    Memory at fe300000 (64-bit, non-prefetchable) [size=1M]
    Memory at fe400000 (64-bit, non-prefetchable) [size=64K]
    Capabilities: <access denied>
    Kernel driver in use: amc525_lmbf

If the kernel driver has not yet been installed, now install it and run ls /dev.  The following files should be present:

Device NodeDescription
amc525_lmbf.0.regRegister interface device node.  Used for control of MBF system.
amc525_lmbf.0.ddr0Access to fast memory buffer for bunch by bunch capture readout.
amc525_lmbf.0.ddr1Access to slow memory buffer for detector readout.
amc525_lmbf/Directory containing physical address links to device nodes.