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Scans through ADC clock to data delays and shows result from reading test pattern. Needs to be run on initial commissioning of new hardware, and should be checked after updating firmware.
tools/find_freq
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|---|---|---|
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$ ./find_freq 499.682
NCO0 D = 5
(R2 = 55, N2 = 1374 = 2 * 687), offset = +91.3%
(R2 = 57, N2 = 1424 = 2 * 712), offset = +65.8%
(R2 = 58, N2 = 1449 = 3 * 483), offset = +53.7%
(R2 = 59, N2 = 1474 = 2 * 737), offset = +42.0%
(R2 = 61, N2 = 1524 = 2 * 762), offset = +19.8%
(R2 = 63, N2 = 1574 = 2 * 787), offset = -1.1%
NCO1 D = 6
(R2 = 46, N2 = 1379 = 7 * 197), offset = +88.7%
(R2 = 53, N2 = 1589 = 7 * 227), offset = -7.1% |
Searches through possible settings for clock PLL divisors to meet the given target frequency (in MHz). Returns a list of possible VCOs and a list of possible divisors in descending order of offset. The offset percentage indicates how far the target frequency is from the tunable centre frequency as a percentage of the full tunable range (±10-4).
Areas of Concern for Portability
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